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IW4049B Description The IW4049B is hex buffers and feature logic-level conversion using only one supply (voltage Vcc).The input- signal high (Vih) can exceed the Vcc supply voltage when these devices are used for logic -level conversions. These devices are intended for use as CMOS to DTL/TTL converters Features Operating Voltage Range: 3.0 to 18 V at 18 V over full packageMaximum input current of 1 u A temperature range ;100 nA at 18 V and 25 C Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply 16 16 DIP - 16 SOP - 16 Package Logic Diagram Pin Assignment A1 3 2 Y1 Vcc Y1 A1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 NC Y6 A1 A2 5 4 Y2 Y2 A2 NC Y5 A5 Y4 A4 A3 7 6 Y3 Y3 A3 GND A4 9 10 Y4 NC = NO CONNECTION A5 11 12 Y5 Function Table Inputs A H L Output Y L H A6 14 15 Y6 PINS 13, 16 = NO CONNECTION PIN 1 = V CC PIN 8 = GND BEIJING ESTEK ELECTRONICS CO.,LTD 1 IW4049B Absolute Maximum Ratings Symbol VCC V IN VOUT IIN PD PD Tstg TL Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP Value -0.5 to 20 to +18 V -0.5 to VCC+0.5 + 10 750 500 100 -65 to 150 260 Unit V V V mA mW mW C C SOIC Package Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. Derating - Plastic DIP: - 10 mW/ from 65to 125 C C from 65 125 C to C SOIC Package The IW4049B has high-to-low level voltage conversion capability but not low-to-high level,thefore it is recommended that Vin Vcc Recommended Operating Conditions Symbol VCC VIN VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 VCC 0 -55 Max 18 18 VCC 125 Unit V V V C The IW4049B has high-to-low level voltage conversion capability but not low-to-high level,thefore it is recommended that Vcc Vin This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, V IN and V OUT should be constrained to the range GND (VIN or VOUT) VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC Unused outputs must be left open. BEIJING ESTEK ELECTRONICS CO.,LTD 2 IW4049B DC Electrical Characteristics (Voltages Referenced to GND) VCC Symbol VIH Parameter Minimum High-Level Input Voltage Maximum Low Level Input Voltage Test Conditions VOUT=0.5 V VOUT=1.0 V VOUT=1.5 V VOUT=0.5 V VOUT=1.0 V VOUT=1.5 V V 5.0 10 15 5.0 10 15 5.0 10 15 Guaranteed Limit -55 C 4 8 12.5 1 2 2.5 4.95 9.95 14.95 25 C 4 8 12.5 1 2 2.5 4.95 9.95 14.95 125 C 4 8 12.5 1 2 2.5 4.95 9.95 14.95 Unit V VIL V VOH Minimum High-Level VIN=GND Output Voltage V VOL Maximum Low-Level Output Voltage VIN=V CC 5.0 10 15 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 V IIN Maximum Input Leakage Current VIN= GND or VCC VIN= GND or VCC 18 5.0 10 15 20 4.5 5.0 10 15 5.0 5.0 10 15 + 0.1 1.0 2.0 4.0 20 3.3 4 10 26 -2.6 1.55 - 0.81 0.48 - 2.0 - 5.2 + 0.1 1.0 2.0 4.0 20 2.6 3.2 8 24 -2.1 -0.65 -1.65 -4.3 + 1.0 30 60 120 600 1.8 2.4 5.6 18 A u uA ICC Maximum Quiescent Supply Current (per Package) IOL Minimum Output Low (Sink) Current VIN= GND or VCC VOL=0.4 V VOL=0.4 V VOL=0.5 V VOL=1.5 V IOH Minimum Output High (Source) Current VIN= GND or VCC VOH=2.5 V VOH=4.6 V VOH=9.5 V VOH=13.5 V mA -1.18 -3.1 BEIJING ESTEK ELECTRONICS CO.,LTD 3 IW4049B AC Electrical Characteristics Symbol tPLH Parameter Maximum Propagation Delay, Input A to Output Y (Figure 1) V V 5 10 10 15 15 5 10 10 15 15 5 10 15 5 10 15 (CL =50pF, RL =200 k ns) V V 5 10 5 15 5 5 10 5 15 5 5 10 15 5 10 15 , Input t r =t f =20 Guaranteed Limit -55 C 25 125 C C 120 65 90 50 90 65 40 30 30 20 160 80 60 60 120 65 90 50 90 65 40 30 30 20 160 80 60 60 40 30 22.5 240 130 180 100 180 130 80 60 60 40 320 160 120 120 80 60 Unit ns tPHL Maximum Propagation Delay, Input A to Output Y (Figure 1) ns tTLH Maximum Output Transition Time, Any Output (Figure 1) Maximum Output Transition Time, Any Output (Figure 1) Maximum Input Capacitance ns tTHL ns CIN pF INPUT A tPHL OUTPUT Y 90% 50% 10% Vcc GND tPLH Vcc 50% 10% 90% GND Figure 1. Switching Waveforms BEIJING ESTEK ELECTRONICS CO.,LTD 4 IW4049B Expanded Logic Diagram (1/6 of the Device) A Y Address : Postalcode:100039 Tel: 86-010-58895780 / 81 / 82 / 83 / 84 Http://www.estek.com.cn Email:sales@estek.com.cn 6A06--6A07 Rm 6A07,Changyin Office Building ,No.88,Yong Ding Road,Hai Dian District ,Beijing Fax : 010-58895793 REV No:01-060836 BEIJING ESTEK ELECTRONICS CO.,LTD 5 |
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